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U.S. Patents Awarded to Inventors in Texas (Dec. 19)
(Targeted News Service Via Acquire Media NewsEdge) Targeted News Service
Targeted News Service
ALEXANDRIA, Va., Dec. 19 -- The following federal patents were awarded to inventors in Texas.
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International Business Machines Assigned Patent for Evaluating Software Sustainability Based on Organizational Information
ALEXANDRIA, Va., Dec. 19 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,336,028) developed by Heather M. Hinton, Austin, Texas, and Ivan M. Milman, Austin, Texas, for an "evaluating software sustainability based on organizational information."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Mechanisms for evaluating software sustainability are provided. The illustrative embodiments provide code scanning tools for identifying authors of portions of a software product and various attributes about the development, maintenance, and improvement of portions of the software product over time. This information may be correlated with organizational information to identify portions of the software product that may be lacking in sustainability by the persons currently associated with the software organization. Moreover, this information may be used to obtain information regarding the relative quality of the composition or conception of portions of the software product, portions of the software product that have required a relatively larger amount of resources to develop over time, a relative indication of which portions of the software product are "harder" or "easier" to sustain and who is associated with those portions of the software product, and the like."
The patent application was filed on Nov. 26, 2007 (11/944,984). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,336,028&OS=8,336,028&RS=8,336,028
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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International Business Machines Assigned Patent for Eliminating, Coalescing, or Bypassing Ports in Memory Array Representations
ALEXANDRIA, Va., Dec. 19 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,336,016) developed by four co-inventors for "eliminating, coalescing, or bypassing ports in memory array representations." The co-inventors are Jason R. Baumgartner, Austin, Texas, Michael L. Case, Pflugerville, Texas, Robert L. Kanzelman, Rochester, Minn., and Hari Mony, Austin, Texas.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Mechanisms are provided in a design environment for eliminating, coalescing, or bypassing ports. The design environment comprises one mechanism to eliminate unnecessary ports in arrays using disabled and disconnected pin information. The design environment may comprise another mechanism to combine and reduce the number of array ports using address comparisons. The design environment may comprise another mechanism to combine and reduce the number of array ports using disjoint enable comparisons. The design environment may comprise one mechanism to combine and reduce the number of array ports using "don't care" computations. The design environment may comprise another mechanism to reduce the number of array ports through bypassing write-to-read paths around arrays."
The patent application was filed on May 7, 2010 (12/775,622). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,336,016&OS=8,336,016&RS=8,336,016
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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International Business Machines Assigned Patent for Provisioning Virtual Resources Using Name Resolution
ALEXANDRIA, Va., Dec. 19 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,336,047) developed by Eric Van Hensbergen, Austin, Texas, for a "provisioning virtual resources using name resolution."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A data string including a resource identifier and one or more resource attributes is parsed at a name resolution module and provided to a computing resource provisioning system. The computer resource provisioning system provisions a resource that corresponds to the resource identifier and that has the at least one. A handle is returned to provide access to the resource at a client system."
The patent application was filed on Aug. 25, 2008 (12/197,363). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,336,047&OS=8,336,047&RS=8,336,047
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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International Business Machines Assigned Patent for Characterization of Long Range Variability
ALEXANDRIA, Va., Dec. 19 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,336,008) developed by four co-inventors for a "characterization of long range variability." The co-inventors are James A. Culp, Newburgh, N.Y., Jerry D. Hayes, Georgetown, Texas, Ying Liu, Austin, Texas, and Anthony D. Polson, Jericho, Vt.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Mechanisms are provided for characterizing long range variability in integrated circuit manufacturing. A model derivation component tests one or more density pattern samples, which are a fabricated integrated circuits having predetermined pattern densities and careful placement of current-voltage (I-V) sensors. The model derivation component generates one or more empirical models to establish range of influence of long range variability effects in the density pattern sample. A variability analysis component receives an integrated circuit design and, using the one or more empirical models, analyzes the integrated circuit design to isolate possible long range variability effects in the integrated circuit design."
The patent application was filed on Sept. 29, 2009 (12/569,421). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,336,008&OS=8,336,008&RS=8,336,008
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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Raytheon Assigned Patent for System and Method for Topology-aware Job Scheduling and Backfilling in an HPC Environment
ALEXANDRIA, Va., Dec. 19 -- Raytheon, Waltham, Mass., has been assigned a patent (8,336,040) developed by Shannon V. Davidson, Hillsboro, Mo., and Anthony N. Richoux, Richardson, Texas, for a "system and method for topology-aware job scheduling and backfilling in an HPC environment."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for job management in an HPC environment includes determining an unallocated subset from a plurality of HPC nodes, with each of the unallocated HPC nodes comprising an integrated fabric. An HPC job is selected from a job queue and executed using at least a portion of the unallocated subset of nodes."
The patent application was filed on April 15, 2004 (10/825,021). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,336,040&OS=8,336,040&RS=8,336,040
Written by Satyaban Rath; edited by Hemanta Panigrahi.
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COGI Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- COGI, Santa Barbara, Calif., has been assigned a patent (8,335,689) developed by four co-inventors for a "method and system for efficient management of speech transcribers." The co-inventors are Andreas Wittenstein, Woodacre, Calif., David Brahm, The Woodlands, Texas, Mark Cromack, Santa Ynez, Calif., and Robert Dolan, Santa Barbara, Calif.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and system for improving the efficiency of speech transcription by automating the management of a varying pool of human and machine transcribers having diverse qualifications, skills, and reliability for a fluctuating load of speech transcription tasks of diverse requirements such as accuracy, promptness, privacy, and security, from sources of diverse characteristics such as language, dialect, accent, speech style, voice type, vocabulary, audio quality, and duration."
The patent application was filed on Oct. 14, 2009 (12/587,894). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,35,689.PN.&OS=PN/83,35,689&RS=PN/83,35,689
Written by Amal Ahmed; edited by Jaya Anand.
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Verizon Patent and Licensing Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Verizon Patent and Licensing, Basking Ridge, N.J., has been assigned a patent (8,335,647) developed by Jeffrey Wayne Kurtti, Prosper, Texas, Donald H. Relyea Jr., Dallas, and Brian F. Roberts, Frisco, Texas, for a "navigation based on popular user-defined paths."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A device receives, from one or more user devices, one or more user-defined paths associated with a starting point and a destination point, and receives, from the one or more user devices, information associated with the one or more user-defined paths. The device also aggregates the one or more user-defined paths and the associated information, and determines one or more popular paths based on the aggregation of the one or more user-defined paths and the associated information, where the one or more popular paths are capable of being utilized by the one or more user devices for selection of a path for navigation."
The patent application was filed on Dec. 4, 2008 (12/327,933). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,35,647.PN.&OS=PN/83,35,647&RS=PN/83,35,647
Written by Amal Ahmed; edited by Jaya Anand.
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Baker Hughes Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Baker Hughes, Houston, has been assigned a patent (8,335,665) developed by Jinsong Zhao, Houston, for an "apparatus and method for high resolution measurements for downhole tools."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "An apparatus and a method for reducing phase noise in measurement signals from a sensor are provided. The apparatus and method, in one aspect, may use a multiphase counter to obtain a count for each sensor signals time cycle and a filter to reduce noise from the obtained counts. A suitable reference frequency, including the reference frequency of the sensor, may be utilized by the multiphase counter."
The patent application was filed on Dec. 30, 2008 (12/346,604). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,35,665.PN.&OS=PN/83,35,665&RS=PN/83,35,665
Written by Amal Ahmed; edited by Jaya Anand.
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Wave Imaging Technology Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Wave Imaging Technology, Houston, has been assigned a patent (8,335,651) developed by Joseph H. Higginbotham, Katy, Texas, Morgan P. Brown, Houston, and Cosmin Macesanu, Katy, Texas, for an "estimation of propagation angles of seismic waves in geology with application to determination of propagation velocity and angle-domain imaging."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "The invention relates to methods and computer-readable medium to implement computing the propagation velocity of seismic waves in the earth. The invention computes the propagation velocity of seismic waves in the earth, which is a condition of obtaining an accurate image of subsurface geology that can be used to prospect for oil and gas deposits. In an embodiment, the method in a host of determining the propagation angles of reflected seismic waves, including inputting data representing reflected seismic waves, inputting a propagation velocity field, computing propagation direction vectors of a source wave field and a receiver wave field using a downward continuation Fourier domain shot record migration using the data representing the reflected seismic waves and the propagation velocity field, and transforming the propagation direction vectors into propagation angles of reflected seismic waves."
The patent application was filed on Oct. 9, 2009 (12/587,607). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,35,651.PN.&OS=PN/83,35,651&RS=PN/83,35,651
Written by Amal Ahmed; edited by Jaya Anand.
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Schlumberger Technology Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Schlumberger Technology, Sugar Land, Texas, has been assigned a patent (8,335,650) developed by four co-inventors for "methods and apparatus to determine phase-change pressures." The co-inventors are Kai Hsu, Sugar Land, Texas, Kentaro Indo, Edmonton, Canada, Peter S. Hegeman, Stafford, Texas, and Carsten Sonne, Houston.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Example methods and apparatus to determine phase-change pressures are disclosed. A disclosed example method includes capturing a fluid in a chamber, pressurizing the fluid at a plurality of pressures, measuring a plurality of transmittances of a signal through the fluid at respective ones of the plurality of pressures, computing a first magnitude of a first subset of the plurality of transmittances, computing a second magnitude of a second subset of the plurality of transmittances, comparing the first and second magnitudes to determine a phase-change pressure for the fluid."
The patent application was filed on Oct. 20, 2009 (12/582,243). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,35,650.PN.&OS=PN/83,35,650&RS=PN/83,35,650
Written by Amal Ahmed; edited by Jaya Anand.
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Oracle America Assigned Patent for Logical Map Table for Detecting Dependency Conditions between Instructions having Varying Width Operand Values
ALEXANDRIA, Va., Dec. 19 -- Oracle America, Redwood City, Calif., has been assigned a patent (8,335,912) developed by four co-inventors for a "logical map table for detecting dependency conditions between instructions having varying width operand values." The co-inventors are Robert T. Golla, Round Rock, Texas, Jama I. Barreh, Austin, Texas, Jeffrey S. Brooks, Austin, Texas, and Howard L. Levy, Cedar Park, Texas.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Techniques and structures are described which allow the detection of certain dependency conditions, including evil twin conditions, during the execution of computer instructions. Information used to detect dependencies may be stored in a logical map table, which may include a content-addressable memory. The logical map table may maintain a logical register to physical register mapping, including entries dedicated to physical registers available as rename registers. In one embodiment, each entry in the logical map table includes a first value usable to indicate whether only a portion of the physical register is valid and whether the physical register includes the most recent update to the logical register being renamed. Use of this first value may allow precise detection of dependency conditions, including evil twin conditions, upon an instruction reading from at least two portions of a logical register having an entry in the logical map table whose first value is set."
The patent application was filed on April 22, 2009 (12/428,461). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,912.PN.&OS=PN/8,335,912&RS=PN/8,335,912
Written by Kusum Sangma; edited by Anand Kumar.
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Hewlett-Packard Development Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Hewlett-Packard Development, Houston, has been assigned a patent (8,335,891) developed by Daniel S. Davis, Houston, and Mark J. Thompson, Spring, Texas, for a "method and system for configuring a storage array."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "There is provided a system and method of configuring a storage array. An exemplary method includes generating information within a storage array controller, the information corresponding to a menu of user options. The exemplary method also includes sending the information from the array controller to a user interface module. The exemplary method also includes sending user instructions comprising a selected menu option from the user interface module to the array controller. The exemplary method also includes executing a configuration task associated with the selected menu option."
The patent application was filed on July 14, 2009 (12/502,485). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,891.PN.&OS=PN/8,335,891&RS=PN/8,335,891
Written by Kusum Sangma; edited by Anand Kumar.
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Texas Instruments Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Texas Instruments, Dallas, has been assigned a patent (8,335,953) developed by Lee D. Whetsel, Parker, Texas, for an "IR gating SC signals during TAP Clock-DR and Pause-DR states."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "The disclosure describes novel methods and apparatuses for controlling a device's TCA circuit when the device exists in a JTAG daisy-chain arrangement with other devices. The methods and apparatuses allow the TCA test pattern set used during device manufacturing to be reused when the device is placed in a JTAG daisy-chain arrangement with other devices, such as in a customers system using the device. Additional embodiments are also provided and described in the disclosure."
The patent application was filed on Dec. 20, 2011 (13/330,788). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,953.PN.&OS=PN/8,335,953&RS=PN/8,335,953
Written by Kusum Sangma; edited by Anand Kumar.
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Hewlett-Packard Development Assigned Patent for Node Differentiation in Multi-node Electronic Systems
ALEXANDRIA, Va., Dec. 19 -- Hewlett-Packard Development, Houston, has been assigned a patent (8,335,879) developed by five co-inventors for a "node differentiation in multi-node electronic systems." The co-inventors are Larry E. Wilson, Tomball, Texas, Hank Dao, Cypress, Texas, Vi T. Lu, Houston, Adnan T. Gunduz, Cypress, Texas, and John D. Nguyen, Cypress, Texas.
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A technique for differentiating nodes in a multi-node electronic system includes establishing an intended configuration for the system, the configuration including a number of nodes to be installed and a specification of intended node locations. A node ID for each of multiple nodes to be installed in the system is established, and the multiple nodes are installed. Using the node ID established for each of the multiple nodes, a determination is made whether the multiple nodes as installed comply with the intended configuration."
The patent application was filed on April 29, 2010 (12/770,132). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,879.PN.&OS=PN/8,335,879&RS=PN/8,335,879
Written by Kusum Sangma; edited by Anand Kumar.
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Syntest Technologies Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Syntest Technologies, Sunnyvale, Calif., has been assigned a patent (8,335,954) developed by Nur A. Touba, Austin, Texas, Laung-Terng Wang, Sunnyvale, Calif., and Shianling Wu, Princeton Junction, N.J., for a "method and apparatus for low-pin-count scan compression."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A low-pin-count scan compression method and apparatus for reducing test data volume and test application time in a scan-based integrated circuit. The scan-based integrated circuit contains one or more scan chains, each scan chain comprising one or more scan cells coupled in series. The method and apparatus includes a programmable pipelined decompressor comprising one or more shift registers, a combinational logic network, and an optional scan connector. The programmable pipelined decompressor decompresses a compressed scan pattern on its compressed scan inputs and drives the generated decompressed scan pattern at the output of the programmable pipelined decompressor to the scan data inputs of the scan-based integrated circuit. Any input constraints imposed by said_combinational logic network are incorporated into an automatic test pattern generation (ATPG) program for generating the compressed scan pattern for one or more selected faults in one-step."
The patent application was filed on June 21, 2012 (13/529,686). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,954.PN.&OS=PN/8,335,954&RS=PN/8,335,954
Written by Kusum Sangma; edited by Anand Kumar.
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Raytheon Assigned Patent for Coupling Processors to Each Other for High Performance Computing (HPC)
ALEXANDRIA, Va., Dec. 19 -- Raytheon, Waltham, Mass., has been assigned a patent (8,335,909) developed by James D. Ballew, Grapevine, Texas, and Gary R. Early, Allen, Texas, for a "coupling processors to each other for high performance computing (HPC)."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard."
The patent application was filed on April 15, 2004 (10/824,874). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,909.PN.&OS=PN/8,335,909&RS=PN/8,335,909
Written by Kusum Sangma; edited by Anand Kumar.
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Freescale Semiconductor Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (8,335,881) developed by David M. Welguisz, Round Rock, Texas, and Gary R. Morrison, Austin, Texas, for a "method and apparatus for handling an interrupt during testing of a data processing system."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method for handling an interrupt during testing of at least one logic block of a processor includes performing a test on at least one logic block of a processor; during the performing, receiving an interrupt; determining a progress status of the test in response to receiving the interrupt; and determining when the processor responds to an interrupt, wherein the determining when the processor responds to an interrupt is based on the progress of the test."
The patent application was filed on March 26, 2010 (12/748,096). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,881.PN.&OS=PN/8,335,881&RS=PN/8,335,881
Written by Kusum Sangma; edited by Anand Kumar.
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Appcelerator Assigned Patent
ALEXANDRIA, Va., Dec. 19 -- Appcelerator, Mountain View, Calif., has been assigned a patent (8,335,982) developed by Paul Colton, Hillsborough, Calif., Uri Sarid, Menlo Park, Calif., and Kevin Edward Lindsey, Benbrook, Texas, for a "system and method for binding a document object model through JavaScript callbacks."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method for binding a form through a JavaScript callback is disclosed herein. During a first session, inputted information in a form is bound with a plurality of JavaScript callbacks. When the session is closed and again reopened, the inputted form is called containing the information inputted from the first session."
The patent application was filed on Dec. 3, 2008 (12/326,891). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,982.PN.&OS=PN/8,335,982&RS=PN/8,335,982
Written by Kusum Sangma; edited by Anand Kumar.
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Texas Instruments Assigned Patent for Tap and Scan Test Port with IR Lock Out Output
ALEXANDRIA, Va., Dec. 19 -- Texas Instruments, Dallas, has been assigned a patent (8,335,952) developed by Lee D. Whetsel, Parker, Texas, for a "tap and scan test port with IR lock out output."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Connection circuitry couples scan test port (STP) circuitry to test access port (TAP) circuitry. The connection circuitry has inputs connected to scan circuitry control output leads from the TAP circuitry, a select input lead, and a clock input lead. The connection circuitry has outputs connected to a scan enable (SE) input lead, a capture select (CS) input lead, and the scan clock (CK) input lead of the STP circuitry. The connection circuitry includes a multiplexer having a control input connected with a clock select lead from the TAP circuitry, an input connected with a functional clock lead, an input connected with the clock input lead, an input connected with a Clock-DR lead from the TAP circuitry, an OFF lead, and an output connected with the scan clock input lead."
The patent application was filed on Dec. 15, 2011 (13/327,183). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,952.PN.&OS=PN/8,335,952&RS=PN/8,335,952
Written by Kusum Sangma; edited by Anand Kumar.
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Dell Products Assigned Patent for Method and System for Restoring System Configuration After Disorderly Shutdown
ALEXANDRIA, Va., Dec. 19 -- Dell Products, Round Rock, Texas, has been assigned a patent (8,335,913) developed by Matthew B. Mendelow, Austin, Texas, Todd W. Schlottman, Round Rock, Texas, and Joshua N. Alperin, Round Rock, Texas, for a "method and system for restoring system configuration after disorderly shutdown."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Disclosed are techniques for recovering system configuration settings, such as remote management, of an information handling system following a disorderly shutdown. A restart controller detects a disorderly shutdown of an information handling system and, in response, sets a disorderly shutdown flag and restarts the information handling system. During the restart, the basic input/output system (BIOS) checks the disorderly shutdown flag as part of its power-on housekeeping. In response to determining the disorderly shutdown flag has been set, the BIOS reconfigures the system configuration settings, such as the power management scheme, of the information handling system so as to enable one or more remote wake mechanisms, such as wake-on-LAN or wake-on-ring. The BIOS then performs an orderly shutdown of the information handling system to place the information handling system in a low-power state, from which the information handling system can be awoken via the remote wake mechanism."
The patent application was filed on Sept. 8, 2008 (12/206,525). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,913.PN.&OS=PN/8,335,913&RS=PN/8,335,913
Written by Kusum Sangma; edited by Anand Kumar.
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Oracle America Assigned Patent for Dynamic Allocation of Resources in a Threaded, Heterogeneous Processor
ALEXANDRIA, Va., Dec. 19 -- Oracle America, Redwood City, Calif., has been assigned a patent (8,335,911) developed by Robert T. Golla, Round Rock, Texas, and Gregory F. Grohoski, Bee Cave, Texas, for a "dynamic allocation of resources in a threaded, heterogeneous processor."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems and methods for efficient dynamic utilization of shared resources in a processor. A processor comprises a front end pipeline, an execution pipeline, and a commit pipeline, wherein each pipeline comprises a shared resource with entries configured to be allocated for use in each clock cycle by each of a plurality of threads supported by the processor. To avoid starvation of any active thread, the processor further comprises circuitry configured to ensure each active thread is able to allocate at least a predetermined quota of entries of each shared resource. Each pipe stage of a total pipeline for the processor may include at least one dynamically allocated shared resource configured not to starve any active thread. Dynamic allocation of shared resources between a plurality of threads may yield higher performance over static allocation. In addition, dynamic allocation may require relatively little overhead for activation/deactivation of threads."
The patent application was filed on Sept. 30, 2009 (12/570,642). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,335,911.PN.&OS=PN/8,335,911&RS=PN/8,335,911
Written by Kusum Sangma; edited by Anand Kumar.
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