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Tilera Announces TILE-Gx72, the World's Highest-Performance and Highest-Efficiency Manycore Processor
BARCELONA, SPAIN and SAN FRANCISCO, CA, Feb 25, 2013 (MARKETWIRE via COMTEX) --
(Mobile World Congress and RSA Booth #2751) -- Tilera(R)
Corporation, the leader in 64-bit manycore general-purpose
processors, announced the TILE-Gx72(TM) processor with 72
power-efficient cores coupled with massive I/O and four
high-performance DDR3 memory controllers to drive the next-generation
of network, multimedia and cloud infrastructure. Tilera will display
the TILE-Gx72 and the accompanying development system at the RSA
Security Conference in San Francisco at the Moscone Convention
Center, February 25-March 1, 2013 in booth #2751.
Tilera's customers are building the intelligent infrastructure for
tomorrow's hyper-connected, mobile networks and the amount of
real-time data and video content is growing exponentially each year.
Substantially more complex services are being offered, and the rapid
pace of new feature additions demands a software-based model with
familiar, standards-based programming tools. Further, OEMs are
insisting on dramatically higher levels of performance and
scalability from their processor supplier.
In less than a year from the launch of its market-leading
TILE-Gx36(TM) processor, Tilera is doubling the compute performance,
doubling the I/O capacity, and continuing the linear scaling of
application performance with increasing core-count that is the
hallmark of the Tile architecture. The TILE-Gx72 leverages Tilera's
many innovations -- including the iMesh(TM) 2-dimensional
interconnect, DDC(TM) distributed coherent cache, and TileDirect(TM)
direct-to-cache I/O -- to deliver the highest compute-per-watt
efficiency of any multicore processor in its class.
"The TILE-Gx72 rounds out our processor portfolio, complementing our
9, 16 and 36-core TILE-Gx processors and is offering a remarkable
range of processing performance," said Devesh Garg, president and CEO
of Tilera. "Customers demand ever-increasing levels of performance
and performance-per-watt to stay competitive and they simultaneously
want to reuse their software and hardware investments across their
product portfolio. The TILE-Gx72 brings an unprecedented amount of
compute to customer designs, and leverages thousands of open source
libraries and the growing Linux ecosystem."
The TILE-Gx72 is ideally suited for compute and I/O-intensive
applications including:
-- L2-7 networking and firewall appliances
-- High throughput SDN (Software Defined Network) computing
-- Network monitoring and analytics with 100% line-rate packet capture at
100 Gbps
-- Layer 7 Deep Packet Inspection (DPI) at over 50 Gbps
-- Compute offload NIC (Network Interface Card)
-- Intrusion prevention and detection (IPS/IDS) at over 20 Gbps
-- "Big Data" transaction processing at over 4 million transactions per
second
-- Streaming video server/content delivery networking offering 50 Gbps
HTTP streaming
-- HD video conferencing with dozens of H.264 1080p encode/decode
channels
"We continue to be impressed with the scalability of the TILE-Gx family
with its seamless software compatibility from 9 cores to 72 cores,"
said Ofer Raz, head of platforms and architecture of Check Point
Software Technologies. "The TILE-Gx72 processor brings the right mix
of compute, low-latency I/O, memory bandwidth, and accelerators for
the needs of our intelligent, integrated security appliances."
"Tilera is raising the bar again with the launch of its flagship
Tile-Gx72 processor," said Linley Gwennap, principal analyst of The
Linley Group. "As the first 64-bit, manycore processor to run
standard SMP Linux across 72 cores on a single chip and capable of
100Gbps networking, the TILE-Gx72 will enable customers to achieve
new levels of performance in multimedia and networking applications."
TILE-Gx72 Technical Highlights
The TILE-Gx72 is a full
System-On-a-Chip (SoC), integrating a broad set of I/O's and memory
controllers to reduce system cost and save on printed circuit board
area.
-- 72 64-bit processor cores - Powerful three-issue cores, designed for
ultra-high power efficiency. Each processor core integrates L1 and L2
caches and supports virtual memory and multiple privilege levels
-- iMesh(TM) two-dimensional multi-tier interconnect - Over 110 Tbps of
bandwidth interconnecting cores, caches, I/O devices and DDR3 memory
controllers
-- 23 Mbytes of on-chip cache - Distributed coherent L3 cache with ECC
protection and Tilera's patented DDC(TM) technology
-- Extensive integrated I/O:
-- Eight 10Gbps Ethernet ports, configurable as 32 1Gbps ports
-- Six PCI Express ports with 24 lanes of SerDes
-- Four on-board DDR3 memory controllers delivering more than 475
Gbps (60 GB/s) of bandwidth and supporting up to 1 TB of attached
memory
-- mPIPE(TM) packet processing subsystem - Delivers C-programmable
wire-speed packet classification, load-balancing, packet ordering and
buffer management for ingress and egress traffic at over 240 million
packets-per-second
-- More than 40Gbps of crypto acceleration - MiCA(TM) subsystem
supports a wide range of security protocols such as SSL, IPsec, SRTP,
MACsec, 3GPP and also accelerates functions such as data deduplication
Availability
The TILE-Gx72 devices are available for sampling. Please contact your
Tilera representative for information.
About Tilera:
Tilera(R) Corporation is the developer of the highest
performance, low power general purpose manycore processors. Tilera is
headquartered in San Jose, Calif., with additional locations
worldwide. For more information, visit www.tilera.com or follow us on
Twitter @Tilera.
Contact Information:
Media Inquiries:
Breakaway Communications for Tilera Corporation
Devan Gillick
Email Contact
415-358-2487
SOURCE: Tilera Corporation
http://www2.marketwire.com/mw/emailprcntct id=C24FE2CC4421BDC4
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