Usage of wireless communication systems, cellular mobile radio and VoIP technology these days has surged exponentially. Consequently, this growth has created a spurred need for bandwidth-efficient, high-speed quality voice coding algorithms.
Cashing in on this necessity for bandwidth-efficient, high-speed quality voice coding algorithms in the market, Noesis Technologies – a Patras, Greece-based silicon IP provider specialized in hardware implementation of high computational complexity telecom algorithms – announced the immediate availability of its ITU-T G.729A-compliant voice codec IP Core.
The ITU-T G.729A CS-ACELP is a high-speech-quality, low-bit rate (8kbps) codec, which is proposed to meet the voice compression requirements of a modern communication system.
Targeted for both ASIC and FPGA technologies for various applications, Noesis’ new ITU-T G.729A IP Core can be utilized as a coprocessor to any processor type and can save significant computing resources for the main processor by efficiently executing the computationally intensive speech coding G729A algorithmic operations.
Featuring selective channel initialization, the new ITU-T G.729A IP Core also offers voice codec capable of multichannel 8kbps voice compression based on ITU-T G729A standard, AMBA bus support for easy SoC integration, completely synchronous design, using single clock and portable to any FPGA/ASIC technology.
Unlike software implementation of ITU-T G.729A algorithm on high-end processors, the new ntG729 hardware accelerator can outperform by a factor of two by supporting twice as many voice channels, requires only half the gate count, thus increasing power efficiency and reducing costs, and presents an overall performance/silicon area ratio four times better than any high-end processor of the market.
The above capabilities were realizable as Noesis Technologies developed revolutionized, highly efficient hybrid architecture that implements real-time multi-channel G729A voice coding.
Currently, the ntG729 IP Core can be integrated in a variety of end-products including access devices, audio/video conferencing equipment, call center equipment, IP phones, IP/PBXs, VoIP gateways, system on chip (SoC) VoIP processors.
In addition, the new core can be delivered as RTL source code, FPGA or ASIC (GDSII) netlist, under an end-user license agreement.
According to Noesis, the new core can exhibit the best performance-silicon area ratio available in the industry.
In recent news, Noesis was accepted as a member of the Xilinx Alliance Program, which is an ecosystem of qualified companies collaborating with Xilinx to help customers develop products faster and with confidence on Targeted Design Platforms.
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Edited by Rachel Ramsey